Quantum Leap Solutions offers an extensive portfolio of silicon proven digital and analog IP across many process platforms. IP is available Off the Shelf or can be ported or customized to your application requirements.
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions to enable efficient and reliable chip design. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, signal/power integrity analysis, and IP prototyping kits. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
Synopsys' IP offerings include:
Synopsys' IP portfolio helps designers efficiently integrate critical connectivity components into their SoC designs, such as USB, PCIe, DDR memory controllers, Ethernet, MIPI, and more.
ARC Processor IP:
Synopsys' ARC processors provide a range of configurable and extensible CPU cores optimized for various applications, from ultra-low-power IoT devices to high-performance computing systems. These processors offer a balance between performance and power efficiency while supporting a variety of software development tools and ecosystems.
The ARC MetaWare Development Toolkit: Facilitates the development of device drivers, firmware, and software stacks for embedded processors.
The ASIP Designer tool enables the creation of Application-Specific Instruction-Set Processors (ASIPs), which are tailored to specific application workloads. This tool allows designers to optimize processor architectures for performance, power, and area based on their unique requirements.
Synopsys' security IP portfolio includes solutions for hardware root of trust, cryptographic accelerators, secure boot, secure key storage, and more. These IP blocks help designers implement robust security features in their SoCs, safeguarding sensitive data and ensuring device integrity.
Synopsys' analog IP offerings cover a wide range of functions, including analog-to-digital converters (ADCs), digital-to-analog converters (DACs), voltage references, PLLs, and more. These analog IP blocks are designed to meet stringent performance and reliability requirements.
Synopsys provides a variety of memory IP solutions, including SRAMs, ROMs, non-volatile memory (NVM), and embedded flash. These memory IP blocks are optimized for various applications and technology nodes.
Synopsys' IP offerings are built on years of expertise and innovation, providing designers with the tools they need to accelerate their development cycles and create competitive and reliable semiconductor solutions. With a focus on quality, performance, and compatibility, Synopsys' IP portfolio helps drive the success of modern SoC designs across diverse industries.
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Flex Logix™ leader of embedded FPGA and AI Inferencing IP.
Flex Logix provides eFPGA cores which have density and performance similar to leading FPGAs in the same process node but only use standard cells. Our EFLX eFPGA is silicon proven in 180nm, 40nm, 28/22nm, 16nm and 12nm with 6/7nm EFLX eFPGA is in design and 5nm next.
Our eFPGA is based on a “tile” called EFLX 4K, which comes in two versions: all logic or mostly logic with some MACs (multiply-accumulators). The programmable logic is called LUTs (lookup tables) that can implement any Boolean function. EFLX 4K Logix has 4000 LUT4 equivalents, EFLX 4K DSP has 3000 LUT4s and 40 Multiplier-Accumulators (MACs): the MAC has a 22-bit pre-adder, a 22×22 multiple and a 48-bit post adder/accumulator. MACs can be combined or cascaded to form fast DSP functions. We can build an eFPGA array of tiles of any combination to match the requirement of the SoC (for 40nm-180nm we offer an EFLX 1K tile for smaller arrays).
The Alphacore design team has extensive experience in delivering complete solutions for a diverse customer base, offering custom products and services that exceed performance requirements to fulfill applications needs. We can provide RF or mixed signal intellectual property (IP), specialized imaging systems, hardware-based cybersecurity solutions as well as custom design services.
Our engineers develop innovative analog and mixed-signal components that fit niche applications and their demanding needs perfectly.
Our focus areas are:
IP / macro solutions for your wireless designs
Automotive IP from our partnersAreas of expertise:
Chiplet technology is a different way of integrating multiple dies in a package or system. There are several approaches to chiplets. The basic idea is that you have a menu of modular chips, or chiplets, in a library. Then, you assemble chiplets in a package and connect them using a die-to-die interconnect scheme. In theory, the chiplet approach is a fast and less expensive way to assemble various types of third-party chips, such as I/Os, memory and processor cores, in a package.
With an SoC, a chip might incorporate a CPU, plus an additional 100 IP blocks on the same chip. That design is then scaled by moving to the next node, which is an expensive process. With a chiplet model, those 100 IP blocks are hardened into smaller dies or chiplets. In theory, you would have a large catalog of chiplets from various IC vendors. Then, you can mix-and-match them to build a system. Chiplets could be made at different process nodes and re-used in different designs.