Silicon IP Products
Quantum Leap Solutions offers an extensive portfolio of silicon proven digital and analog IP across many process platforms. IP is available Off the Shelf or can be ported or customized to your application requirements.
- Best in class Silicon Proven IP and ASIC solutions
- IP customized for your application & market
- Specifications, process offerings, and deliveries
- Flexible IP and ASIC engagement models:
- IP Licensing and services
- Turnkey ASICs – specializing in wireless & mixed signal ASICs
- Standard Product to ASIC conversion services to reduce cost & protect your IP
- Turnkey manufacturing services for packaging, assembly and test
- View our Partners' offerings in our QLS Partner Portfolio
IP Partner Offerings
Synopsys IP
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Click Here for a Comprehensive List of Synopsys IP Products
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions to enable efficient and reliable chip design. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, signal/power integrity analysis, and IP prototyping kits. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
Synopsys' IP offerings include:
Interface IP:
Synopsys' IP portfolio helps designers efficiently integrate critical connectivity components into their SoC designs, such as USB, PCIe, DDR memory controllers, Ethernet, MIPI, and more.
ARC Processor IP:
Synopsys' ARC processors provide a range of configurable and extensible CPU cores optimized for various applications, from ultra-low-power IoT devices to high-performance computing systems. These processors offer a balance between performance and power efficiency while supporting a variety of software development tools and ecosystems.
The ARC MetaWare Development Toolkit: Facilitates the development of device drivers, firmware, and software stacks for embedded processors.
ASIP Designer:
The ASIP Designer tool enables the creation of Application-Specific Instruction-Set Processors (ASIPs), which are tailored to specific application workloads. This tool allows designers to optimize processor architectures for performance, power, and area based on their unique requirements.
Security IP:
Synopsys' security IP portfolio includes solutions for hardware root of trust, cryptographic accelerators, secure boot, secure key storage, and more. These IP blocks help designers implement robust security features in their SoCs, safeguarding sensitive data and ensuring device integrity.
Analog IP:
Synopsys' analog IP offerings cover a wide range of functions, including analog-to-digital converters (ADCs), digital-to-analog converters (DACs), voltage references, PLLs, and more. These analog IP blocks are designed to meet stringent performance and reliability requirements.
Memory IP:
Synopsys provides a variety of memory IP solutions, including SRAMs, ROMs, non-volatile memory (NVM), and embedded flash. These memory IP blocks are optimized for various applications and technology nodes.
Synopsys' IP offerings are built on years of expertise and innovation, providing designers with the tools they need to accelerate their development cycles and create competitive and reliable semiconductor solutions. With a focus on quality, performance, and compatibility, Synopsys' IP portfolio helps drive the success of modern SoC designs across diverse industries.
Click here for Synopsys’ full IP portfolio.
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QuickLogic
QuickLogic, a trusted partner of Quantum Leap Solutions, brings over 35 years of expertise in FPGA technology. Headquartered in San Jose, CA, and ISO-9001 certified, QuickLogic is a NASDAQ-listed company (QUIK) known for its innovative programmable logic solutions.
Key Offerings:
- eFPGA IP: QuickLogic's embedded FPGA Intellectual Property (eFPGA IP) enhances integration, reduces latency, and lowers power consumption compared to traditional FPGAs. It supports a wide range of process nodes from 12nm to 250nm, making it suitable for various applications, including commercial, automotive, and radiation-hardened environments.
- Design Services: QuickLogic offers comprehensive design services to help customers achieve efficient, reliable, and scalable reprogrammable logic architectures. Their open-source tools and flexible solutions ensure fast time-to-market and easy integration with standard ASIC tool flows.
- Device Storefront: QuickLogic provides a storefront for FPGAs, chiplets, and more, catering to diverse customer needs.
Market Applications:
QuickLogic's solutions are widely adopted in various markets, including aerospace and defense, industrial automation, automotive, data centers, and wireless communication. Their eFPGA technology is particularly beneficial for applications requiring efficient calculation, precise timing, security, and size, weight, power, and cost reduction (SWAP-C).
Recognition:
QuickLogic has been honored with multiple awards, including BAE Systems' 'Partner 2 Win' Supplier of the Year award and the 'FAST LabsTM Technology Innovation Partner Of The Year' award, highlighting their dedication to delivering state-of-the-art embedded FPGA Hard IP capability to the Defense Industrial Base.
Innovative Solutions:
QuickLogic's FPGA-based solutions offer flexibility, adaptability, and built-in security features. Their technology enables continuous reprogramming to comply with updated security standards, making them a pivotal tool in the defense against cyberattacks.
Future Vision:
QuickLogic is committed to advancing programmable logic solutions with their chiplet vision, supporting new process nodes and enabling seamless integration with other chiplets based on application needs.
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Alphacore
The Alphacore design team has extensive experience in delivering complete solutions for a diverse customer base, offering custom products and services that exceed performance requirements to fulfill applications needs. We can provide RF or mixed signal intellectual property (IP), specialized imaging systems, hardware-based cybersecurity solutions as well as custom design services.
Our engineers develop innovative analog and mixed-signal components that fit niche applications and their demanding needs perfectly.
Our focus areas are:
- Analog, Mixed Signal and RF Solutions
- Imaging Solutions
- Radiation Hardened Electronics
- Emerging Technologies
Data Converter Architectures
- Delta-Sigma
- Consumer, IOT, Wearables
- High Resolution, ultra low power
- Lowest power up to a few MS/s
- Pipelined
- Consumer, WiFi, Lidar
- High Resolution, High Dynamic Range, Moderate power
- Hybrid SAR
- Sat Comms, 5G, Automotive, Lidar, Exotic Compute
- Highest Sample Rate, lowest power
- Parallel Flash
- Sat Comms, 5G, Automotive
- Low Resolution, Ultra-High Speed
- Lowest power in the industry
- Analog blocks
- LDO, Bandgap, Comparators, Regulators
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IP Type Offered by QLS Partners
Design IP
- ADC, DAC - 1MS/s to 20GS/s (radiation hardened options)
- RF and AFE subsytems
- NOC (Custom Coherent and Non-Coherent Network on Chip)
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RFIC and Wireless ASICs
IP / macro solutions for your wireless designs
- ADC and DACs to support Lidar, Radar, 5G and SatComm applications (up to 20GS/s)
- ADCs and DACs to support Industrial IoT, WiFi and BLE applications
- Automotive Fusa and ASIL-B, ASIL-D design support
- RF and mmwave macro and design expertise
- MIMO beamforming
- PCIe gen 3/4/5
- RFICs and mixed signal ASICs
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Automotive Sensors
Automotive IP from our partners
Areas of expertise:- Lidar, Radar, Sensors, ADAS
- ADC/DAC up to 20GB/s sampling (customizable)
- ASIL-B, ASIL-D support
- 25GE, Automotive Ethernet
- C-PHY, D-PHY, A-PHY
- RFIC and Mixed Signal ASICs
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Chiplets
Chiplet technology is a different way of integrating multiple dies in a package or system. There are several approaches to chiplets. The basic idea is that you have a menu of modular chips, or chiplets, in a library. Then, you assemble chiplets in a package and connect them using a die-to-die interconnect scheme. In theory, the chiplet approach is a fast and less expensive way to assemble various types of third-party chips, such as I/Os, memory and processor cores, in a package.
With an SoC, a chip might incorporate a CPU, plus an additional 100 IP blocks on the same chip. That design is then scaled by moving to the next node, which is an expensive process. With a chiplet model, those 100 IP blocks are hardened into smaller dies or chiplets. In theory, you would have a large catalog of chiplets from various IC vendors. Then, you can mix-and-match them to build a system. Chiplets could be made at different process nodes and re-used in different designs.
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